The Interrupt Cycle

Recall the design of the Mano Simulator includes seven flip-flops: I, S, E, R, IEN, FGI, and FGO. There are two instructions, ION and IOF, the programmer can use to set and clear the interrupt enable flag, IEN. External devices (input or output in this instance) requesting an interrupt asynchronously set the two flags FGI and FGO. The FGI and FGO flags are cleared to zero when the respective input, INP, output, OUT, instruction is executed. Additionally, there are two instructions used by the interrupt subroutine to determine which interrupt to service, skip on input flag –SKI and skip on output flag –SKO.

The process of communication between the CPU and an external device can be handled in many ways. Due to the relative speeds of the CPU and most other devices, we prefer to utilize a technique that minimizes the CPU idle time. One technique to accomplish this is with an interrupt facility. Here the external device informs the CPU when it is ready. Consider the case of a simple input/output interrupt request. While the computer is running a program, it does not check the interrupt flags. In the event that a flag is set, the computer is temporarily interrupted to handle the input/output transfer. It then returns to the current program to continue on where it left off.

In a Von Neumann machine, only one program can be executed at any given time even though several may be stored in memory. The interrupt facility handles the data transfer for other programs used to service a device. We use the ION and IOF instructions to program our machine to set interrupt facility (the IEN flag).

Interrupt Facility:

Ø The instructions ION and IOF set IEN flag enabling the programmer to make the decision on whether or not to use the interrupt facility.

Ø When the device is ready, it informs the computer by setting its flag

§ Input device sets FGI to 1

§ Output device sets FGO to 1

Ø If either FGI or FGO is set to 1 and IEN is 1, then control signal R is set to 1. (This can occur on any clock cycle after T₂.)

The semantics for the transfer of control to the interrupt handler are:

RT₀: AR¬ 0, TR¬ PC
RT₁: M[AR]¬ TR, PC¬ 0
RT₂: PC¬ PC+1, IEN¬ 0, R¬ 0.

The service routine must have instructions to perform these six tasks:

1. Save contents of processor registers (AC, E on our machine)

2. Check which flag is set (FGI/FGO)

3. Service the device whose flag is set.

4. Restore contents of processor registers.

5. Turn the interrupt facility on.

6. Return to the running program.

Program to Service an Interrupt Location
0	ZRO,	¾	/Return address stored here
1		BUN SRV	/Branch to service routine
100		CLA	/Portion of running program
101		ION	/Turn on interrupt facility
102		LDA X
103		ADD Y	/interrupt occurs here Q
104		STA Z	/Program returns here after interrupt
·	·
·	·
·			/Interrupt service routine
200	SRV,	STA SAC	/Store content of AC
		CIR	/Move E into AC(1)
		STA SE	/Store content of E
		SKI	/Check input flag
		BUN NXT	/Flag is off, check next flag
		INP	/Flag is on, input character
		OUT	/Print character
		STA PT1 I	/Store it in input buffer
		ISZ PT1	/Increment input pointer
	NXT,	SKO	/Check output flag
		BUN EXT	/Flag is off, exit
		LDA PT2 I	/Load character from output buffer
		OUT	/Output character
		ISZ PT2	Increment output pointer
	EXT,	LDA SE	/Restore value of AC(1)
		CIL	/Shift it to E
		LDA SAC	Restore content of AC
		ION	/Turn interrupt on
		BUN ZRO I	/Return to running program
	SAC,	¾	/AC is stored here
	SE,	¾	/E is stored here
	PT1,	¾	/Pointer of input buffer
	PT2,	¾	/Pointer of output buffer

Adapted from Table 6-23, Computer System Architecture, Third Edition by M. Morris Mano, 1993, Prentice Hall.