Digital Components (Based on Mano, Computer System Architecture, Third Edition, pp 41-45, 58)

Integrated circuits (IC)

A small silicon semiconductor crystal containing components for digital gates. The gates are connected inside the chip to form the required circuit. The chip is mounted on ceramic or plastic and has small gold wires welded to external pins (14-200). ICs are distinguished by scale and logic family.
1) Scale (number of gates): SSI (small scale integration, < 10), MSI (medium scale integration, 10 - 200), LSI (large scale integration, 200 - 10,000), VLSI (very large scale integration, 10k - 100+ million).
2) Logic Families (distinguished by design and operating factors): TTL (transistor-transistor logic, 5 volts logic levels of 0 v and 3.5 v), ECL (emitter-coupled logic, very fast with only 1 nanosecond propagation delay due to transistors oprating in nonsaturated state), MOS (metal-oxide semiconductor, either n-channel (electron flow dependent) or p-channel (hole flow dependent), CMOS (complementary MOS, uses PMOS and NMOS  in a complementary fashion to achieve high density low power economical circuits).

Decoders

A combinational circuit that converts binary information from n coded inputs to a maximum of 2ⁿ unique outputs. Commonly referred to as an n X m decoder. So an 3 X 8 decoder will take three inputs, say x2, x1, and x0 and decode this input into one of the eight possible values that can be represented by this input.

Encoder

A digital circuit that performs the inverse operation of a decoder. Consider an octal to binary encoder. It has eight input lines which are encoded to a binary representation corresponding to which (0 .. 7) octal input is high. It is assumed that only one input has a signal of 1 at any given time.

Multiplexers (MUX)

A combinational circuit that receives binary information from one of 2ⁿ input data lines (its size) and directs it to a single output line. The selection of a particular input data line for the output is determined by a set of selection inputs. A 2ⁿ to 1 multiplexer has 2ⁿ input data lines and n input selection lines whose bit combinations determine which input data are selected for output. The gates and inverters resemble a decoder

Registers

A group of flip-flops with each flip-flop capable of storing one bit of information. Typically combined with combiantional circuitry that determines when and how new information is transferred to the register. Clear input goes to a special terminal in each flip-flop so that when this signal is low (0), all flip-flops reset asynchronously, otherwise it must be maintained a logic 1 during normal clocked operations. The clear  input is useful for clearing the register to zero prior to its clocked input operation. Load is an enable signal that allows transfer of information to the register. If all bits are loaded simultaneously with a common clock pulse transition, we say that the loading is done in parallel.

Memory Unit

A memory unit is a collection of storage cells together with associated circuits needed to transfer information in and out of storage. The memory stores binary information in groups of bits called words.